The present disclosure relates to a memory device including a nonvolatile memory formed by memory cells capable of writing and reading multi-valued data, and to a memory device having an improved processing speed, a memory control device, and a memory control method.
In recent years, flash memories have been familiar as a kind of nonvolatile memory. In particular, a NAND-type flash memory is inexpensive and has a relatively high data write and read speed as a flash memory. Accordingly, the NAND-type flash memory is expected to replace an existing storage device such as an HDD (Hard Disk Drive), and so on.
In the NAND-type flash memory, one memory cell capable of storing data of a plurality of bits has been devised. This is called a multi-level cell (MLC). A related-art memory cell capable of storing one-bit data is called a single-level cell (SLC). In terms of operation speed and permissible number of times of writing, the SLC is superior. However, in terms of memory capacity, it is possible for the MLC to have a large capacity. Japanese Unexamined Patent Application Publication No. 2010-198407 has disclosed a configuration including an MLC area and an SLC area, and in which a life time as a storage device is increased by a combination of these areas, and at the same time, a recording density is increased. Also, Japanese Unexamined Patent Application Publication No. 2008-198265 has disclosed a configuration in which write speed is improved for a NAND-type flash memory including an MLC area.